8086 Microprocessor MCQ's
1. The
first micro-processor had a (n) ______.
a) 1-bit data
bus b) 2- bit data bus
c) 3-bit
data bus d) 4-bit data bus
Answer:
d
Explanation: Intel introduced its first 4-bit microprocessor in 1971.
Explanation: Intel introduced its first 4-bit microprocessor in 1971.
2.
__________ processor is first introduced by the Intel in 1971.
a) 8080 b) 4004 c) 8008 d) 8085
Answer:
b
Explanation: Intel introduced its first 4-bit microprocessor 4004 in 1971.
Explanation: Intel introduced its first 4-bit microprocessor 4004 in 1971.
3. Which of
the following is/are 8-bit micro processor?
a) 8008 b) 8080 c) 8085 d) All of the mentioned
Answer:
d
Explanation: The microprocessor 8008 in 1972, 8080 in 1974 and 8085 all are 8-bit microprocessors.
Explanation: The microprocessor 8008 in 1972, 8080 in 1974 and 8085 all are 8-bit microprocessors.
4. The
limitations of the 8-bit microprocessors was/were is ________.
a) Low speed of execution b) Low memory addressing capability
c) Less powerful instruction set d) All of the mentioned
Answer:
d
Explanation: The main limitations of 8-bit microprocessor were their low speed of execution, low memory addressing capability, limited number of general purpose registers and a less powerful instruction set.
Explanation: The main limitations of 8-bit microprocessor were their low speed of execution, low memory addressing capability, limited number of general purpose registers and a less powerful instruction set.
5.
The number of address and data lines of 8085 are____.
a) 8 and 8 b) 16 and 8 c) 8 and 16 d) 16 and 16
Answer:
b
Explanation: The 8085 microprocessor is a 8-bit microprocessor having 16 address lines and 8 data lines.
Explanation: The 8085 microprocessor is a 8-bit microprocessor having 16 address lines and 8 data lines.
6. Intel’s
8086 were launched in the year_____.
a) 1971 b) 1972 c) 1974 d) 1978
Answer:
d
Explanation: Intel’s 8086 is the first 16-bit microprocessor launched in 1978.
Explanation: Intel’s 8086 is the first 16-bit microprocessor launched in 1978.
7. Which is
the microprocessor comprises?
a) Register section b) One or more ALU c) Control unit d) All of the mentioned
Answer:
d
Explanation: The major modules of a microprocessor are registers, CPU (A.L.U+ control unit).
Explanation: The major modules of a microprocessor are registers, CPU (A.L.U+ control unit).
8. A
16-bits address bus can generate _____addresses.
a) 32767 b) 25652 c) 65536 d) None of the mentioned
Answer:
c
Explanation: By using n-address lines 2^n addresses can be generated. Therefore by using 16- address lines 2^16 = 65,536 addresses can be generated.
Explanation: By using n-address lines 2^n addresses can be generated. Therefore by using 16- address lines 2^16 = 65,536 addresses can be generated.
1.
The register of 8086 are_____ bits in size.
a) 8 b) 12 c) 16 d) 20
Answer:
c
Explanation: 8086 microprocessor is a 16-bit microprocessor and all the registers of 8086 are 16-bit registers.
Explanation: 8086 microprocessor is a 16-bit microprocessor and all the registers of 8086 are 16-bit registers.
2. Which of
the following registers are not available in 8086 microprocessor?
a) General data register b) Segment registers
c) Pointer and Index register d) All of the mentioned
Answer:
d
Explanation: 8086 containing powerful set of registers containing general purpose and special purpose registers. The special purpose registers are used as segment registers, pointers, index registers. It has a 16-bit Flag register.
Explanation: 8086 containing powerful set of registers containing general purpose and special purpose registers. The special purpose registers are used as segment registers, pointers, index registers. It has a 16-bit Flag register.
3. Which of
the following is a 16-bit register?
a) AL b) AX c)
AH d) All of the mentioned
Answer:
b
Explanation: AX is a 16-bit register used as accumulator, with lower 8-bits designated as AL and higher 8-bits as AH.
Explanation: AX is a 16-bit register used as accumulator, with lower 8-bits designated as AL and higher 8-bits as AH.
4. _______
register is used as a default counter in case of string and loop instructions.
a) AX b) BX c)
CX d) DX
Answer:
c
Explanation: CX is used as a default counter in case of string and loop instructions. The loop instruction is executed based on the value in the CX register.
Explanation: CX is used as a default counter in case of string and loop instructions. The loop instruction is executed based on the value in the CX register.
5. ______
register is used as an implicit operand or destination operand in case of
arithmetic instructions and Input-Output instructions.
a) AX b) BX c)
CX d) DX
Answer:
d
Explanation: DX register is a general purpose register which may be used as an implicit operand or destination operand in case of a few instructions.
Explanation: DX register is a general purpose register which may be used as an implicit operand or destination operand in case of a few instructions.
6. The
number of address and data lines of 8086_________.
a) 8 and 8 b) 16 and 16 c) 20 and 16 d) 16 and 20
Answer:
c
Explanation: The 8086 microprocessor is a 16-bit microprocessor having 20 address lines and 16 data lines.
Explanation: The 8086 microprocessor is a 16-bit microprocessor having 20 address lines and 16 data lines.
7. _______
is the most important segment and it contains the actual assembly language
instructions to be executed by the microprocessor.
a) Data segment b) Code segment c) Stack segment d) Extra segment
Answer:
b
Explanation: The code segment register is used for addressing a memory location in the code segment of memory, where executable program is stored.
Explanation: The code segment register is used for addressing a memory location in the code segment of memory, where executable program is stored.
8. Base
Pointer (BP) contains offset address of ________ segment.
a) Data segment b) Code segment c) Stack segment d) Extra segment
Answer:
a
Explanation: The pointers contain offset within the particular segments. The BP usually contain offset within the data segment.
Explanation: The pointers contain offset within the particular segments. The BP usually contain offset within the data segment.
9.
Instruction Pointer (IP) contains offset address of ________ segment.
a) Data segment b) Code segment c) Stack segment d) Extra segment
Answer:
b
Explanation: The pointers contain offset within the particular segments. The IP usually contain offset within the code segment.
Explanation: The pointers contain offset within the particular segments. The IP usually contain offset within the code segment.
10. The
Instruction Pointer is ______ bits in length.
a) 8 bits b) 4 bits c) 16 bits d) 32 bits
Answer:
c
Explanation: 8086 microprocessor is a 16-bit microprocessor and all the registers of 8086 are 16-bit registers. So, Instruction pointer is a 16 bit register.
Explanation: 8086 microprocessor is a 16-bit microprocessor and all the registers of 8086 are 16-bit registers. So, Instruction pointer is a 16 bit register.
11. The index register is used to hold __________.
a) Segment memory b) Offset memory c) Offset address d) Segment address
Answer:
c
Explanation: The 20-bit address is divided into segment address and offset address. Segment address is stored by using segment registers and Offset address is stored by index and pointer registers.
Explanation: The 20-bit address is divided into segment address and offset address. Segment address is stored by using segment registers and Offset address is stored by index and pointer registers.
12. SI and DI registers is used to store the offset addresses of _______.
a) CS and DS or ES b) DS and DS or ES c) DS or ES and CS d) DS and ES
Answer:
b
Explanation: The register SI is generally used to store the offset of source data in the data segment while the register DI is used to store the offset of destination in data or extra segment.
Explanation: The register SI is generally used to store the offset of source data in the data segment while the register DI is used to store the offset of destination in data or extra segment.
13. Which of the following is not a machine control flag?
a) Direction flag b) Interrupt flag c) Overflow flag d) Trap flag
Answer:
c
Explanation: The flag register of 8086 is divided into status flags or condition code flags and machine control flags. Direction, Interrupt, Trap flags comes under machine control flags.
Explanation: The flag register of 8086 is divided into status flags or condition code flags and machine control flags. Direction, Interrupt, Trap flags comes under machine control flags.
14. In 8086 the overflow flag is set when______.
a) The sum is more than 16 bit b) Carry and sign flags are set
c) Signed numbers go out of their range after an arithmetic operation
d) During subtraction
Answer:
c
Explanation: The overflow flag is set, if the result of a signed operation is large enough to be accommodated in a destination register. I.e., in case of the addition of two signed numbers, the result overflows into the sign bit.
Explanation: The overflow flag is set, if the result of a signed operation is large enough to be accommodated in a destination register. I.e., in case of the addition of two signed numbers, the result overflows into the sign bit.
15. Direction flag is used with ____.
a) String instructions b) Stack Instructions c) Arithmetic Instructions
d) Branch Instructions
Answer:
a
Explanation: Direction flag is used by string manipulation instructions. If D=0, the string is processed beginning from the lowest address to the highest address, i.e. auto incrementing mode. If D=1, the string is processed beginning from the highest address to the lowest address, i.e. auto decrementing mode.
Explanation: Direction flag is used by string manipulation instructions. If D=0, the string is processed beginning from the lowest address to the highest address, i.e. auto incrementing mode. If D=1, the string is processed beginning from the highest address to the lowest address, i.e. auto decrementing mode.
16. If there is a carry from lowest nibble during addition, ______ flag sets.
a) Carry b) Auxiliary carry c) Over flow d) Sign
Answer:
b
Explanation: If there is a carry from the lowest nibble, i.e. bit 3, during addition or borrow for the lowest nibble, i.e. bit 3, during subtraction, then auxiliary flag is set.
Explanation: If there is a carry from the lowest nibble, i.e. bit 3, during addition or borrow for the lowest nibble, i.e. bit 3, during subtraction, then auxiliary flag is set.
17. If_________ flag is set; the processor enters the single step execution mode.
a) Direction b) Trap c) Interrupt d) Zero
Answer:
b
Explanation: If Trap flag is set, the processor enters the single step execution mode. In other words, a trap interrupt is generated after execution of each instruction.
Explanation: If Trap flag is set, the processor enters the single step execution mode. In other words, a trap interrupt is generated after execution of each instruction.
1. The
Intel 8086 microprocessor is a_____ processor.
a) 8 bits b) 4 bits c) 16 bits d) 32 bits
Answer:
c
Explanation: 8086 supports a 16-bit ALU, a set of 16-bit registers. Based on this we can say 8086 is a 16-bit microprocessor.
Explanation: 8086 supports a 16-bit ALU, a set of 16-bit registers. Based on this we can say 8086 is a 16-bit microprocessor.
2. What is
/are the improvement is in the architecture of 8086 over 8085 architecture
a) A 16-bit ALU, a set of 16-bit registers b)
Segmented memory addressing
c) Fetched instruction queue for overlapped fetching and execution
d) All of the mentioned
Answer:
d
Explanation: 8086 supports a 16-bit ALU, a set of 16-bit registers and provides segmented memory addressing capability, a rich instruction set, powerful interrupt structure, fetched instruction queue for overlapped fetching and execution.
Explanation: 8086 supports a 16-bit ALU, a set of 16-bit registers and provides segmented memory addressing capability, a rich instruction set, powerful interrupt structure, fetched instruction queue for overlapped fetching and execution.
3. The BIU
prefetches the instruction from memory and store them in _____.
a) Queue b) Register c) Memory d) Stack
Answer:
a
Explanation: BIU prefetches the instruction from memory and store them in predecoding instruction byte queue.
Explanation: BIU prefetches the instruction from memory and store them in predecoding instruction byte queue.
4. The 8086
fetch instruction one after another from ______ of memory.
a) Data segment b) Code segment c) Extra segment d) Stack segment
Answer:
b
Explanation: BIU prefetches the instruction from code segment of physical memory and store them in predecoding instruction byte queue.
Explanation: BIU prefetches the instruction from code segment of physical memory and store them in predecoding instruction byte queue.
5. Which is
not part of execution unit?
a) ALU b) Address conversion mechanism c) Flag register
d) General purpose registers
Answer:
b
Explanation: The execution unit contains general purpose registers, ALU, flag register, decoding circuit, and timing and control circuit.
Explanation: The execution unit contains general purpose registers, ALU, flag register, decoding circuit, and timing and control circuit.
6. The
length of predecoding instruction byte queue is _______ bytes long.
a) 2 b) 4 c) 6 d) 8
Answer:
c
Explanation: The length of predecoding instruction byte queue is 6 bytes long as the maximum size of instruction that supported by 8086 processor is 6 bytes.
Explanation: The length of predecoding instruction byte queue is 6 bytes long as the maximum size of instruction that supported by 8086 processor is 6 bytes.
7. If
segment address = 1005 H, offset address = 5555 H, then the physical address is_____.
a) 655A H b) 155A5 H c) 4550 H d) 56555
Answer:
b
Explanation: Physical address = segment address*10H + offset address (or) shift the segment address by four bits to its left and then add the offset address. From the given data Physical address= 1005*10H+ 5555H = 155A5H.
Explanation: Physical address = segment address*10H + offset address (or) shift the segment address by four bits to its left and then add the offset address. From the given data Physical address= 1005*10H+ 5555H = 155A5H.
8. In a
segment if offset is a 16-bit number, then the maximum possible locations
are_____.
a) 1 KB b) 64 bytes c) 64 KB d) 1 MB
Answer:
c
Explanation: If the offset is a n-bit number, then the maximum possible locations are 2^n, therefore for a 16-bit number, maximum possible locations are 2^16= 2^6*2^10= 64 KB.
Explanation: If the offset is a n-bit number, then the maximum possible locations are 2^n, therefore for a 16-bit number, maximum possible locations are 2^16= 2^6*2^10= 64 KB.
9.
If the size of the segment is 64 kb, what will be the starting and ending off
set addresses of it
a) 0000H to 7FFFH b) 0000H to FFFFH c) 8000H to FFFFH d) 00000H to FFFFFH
Answer:
b
Explanation: If size of the segment is 64KB, then number of address lines are log (64KB) of base 2. Therefore 16 address lines are required, and then the starting and ending offset addresses are from 16 0’s to 16 1’s. Therefore addresses are from 0000H to FFFFH.
Explanation: If size of the segment is 64KB, then number of address lines are log (64KB) of base 2. Therefore 16 address lines are required, and then the starting and ending offset addresses are from 16 0’s to 16 1’s. Therefore addresses are from 0000H to FFFFH.
10. Of the
segment addresses are assigned as 0000H to F000H and the offset addresses
values are from 0000H to FFFFH, then the physical addresses range from_____.
a) 0000H to FFFFH b) 00000H to F0000H c) 00000H to FFFFF d) 0000H to FFF0H
Answer:
c
Explanation: If the segment addresses are from 0000H to F000H. Each segment is of size 64 KB; it contains offset addresses from 0000H to FFFFH. Therefore the physical addresses range from 00000H to FFFFFH.
Explanation: If the segment addresses are from 0000H to F000H. Each segment is of size 64 KB; it contains offset addresses from 0000H to FFFFH. Therefore the physical addresses range from 00000H to FFFFFH.
11. When
one segment starts before the end of another segment then we call them
as_______.
a) Non-overlapping segments b) Overlapping segments
c) Stack area d) None of these
Answer:
b
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